The present invention relates to a line interface circuit for binary data having a receiver and/or transmitter, especially to a DS3-line Interface Linear Array (LILA).
Line interface circuits are necessary to connect trunk lines to a switching matrix. These circuits perform the function of receiving and/or transmitting data frames, e.g. 44.736 Mb/s DS3 data streams, and of reformatting the frames for transmission over high speed digital buses to the switching matrix. Such z line interface circuit also handles clock regeneration, line impedance matching, line build out and equalization functions.
An application note of EXAR Corporation of March 1985 discloses on pages 1-449 and 1-451 PCM Line Receiver and Clock Recovery Circuits which provide circuitry required to perform automatic line build out (ALBO). Amplitude equalization cf received line signals is achieved through shaping the frequency spectrum with the help of variable impedance ALBC ports. Clock recovery is done by an LC tank circuit.